416 search results - page 20 / 84 » CMOL FPGA circuits |
IEICET
2006
13 years 11 months ago
2006
TRETS
2008
13 years 10 months ago
2008
FPGA
2007
ACM
14 years 5 months ago
2007
ACM
This paper describes a technique that reduces dynamic power in FPGAs by reducing the number of glitches in the global routing resources. The technique involves adding programmable...
FPGA
1995
ACM
14 years 2 months ago
1995
ACM
This paper presents a methodology for production-time testing of (uncustomized) segmented channel eld programmable gate arrays (FPGAs) such as those manufactured by Actel [1]. Th...
FPGA
2010
ACM
14 years 7 months ago
2010
ACM
Monte Carlo based SSTA serves as the golden standard against alternative SSTA algorithms, but it is seldom used in practice due to its high computation time. In this paper, we acc...