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» CMOS Comparators for High-Speed and Low-Power Applications
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VLSID
2009
IEEE
119views VLSI» more  VLSID 2009»
14 years 8 months ago
Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded Systems
Abstract-- Single-ended static random access memory (SESRAM) is well known for their tremendous potential of low active power and leakage dissipations. In this paper, we present a ...
Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhi...
DAC
2005
ACM
13 years 9 months ago
Sign bit reduction encoding for low power applications
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...
M. Saneei, Ali Afzali-Kusha, Zainalabedin Navabi
DSD
2006
IEEE
183views Hardware» more  DSD 2006»
14 years 1 months ago
Design and Implementation of Low-Area and Low-Power AES Encryption Hardware Core
The Advanced Encryption Standard (AES) algorithm has become the default choice for various security services in numerous applications. In this paper we present an AES encryption h...
Panu Hämäläinen, Timo Alho, Marko H...
CORR
2010
Springer
196views Education» more  CORR 2010»
13 years 7 months ago
Low Power Reversible Parallel Binary Adder/Subtractor
In recent years, Reversible Logic is becoming more and more prominent technology having its applications in Low Power CMOS, Quantum Computing, Nanotechnology, and Optical Computin...
H. G. Rangaraju, U. Venugopal, K. N. Muralidhara, ...
CDES
2006
240views Hardware» more  CDES 2006»
13 years 8 months ago
Design of Low Power 4-Tap 8-Bit Adiabatic FIR Filter
Abstract-- Digital signal processing (DSP) is used to perform filtering, decimation and down conversion in common communications systems, like in oversampling analog to digital con...
Arun N. Chandorkar, Gurvinder Singh