In this paper, a voltage-controlled ring oscillator (VCO) with wide linear tuning frequency range capability based on transmission gates is described. It also features the rapid v...
CMOS Phase-locked loops (PLL) are ubiquitous in RF and mixed-signal integrated circuits. PLLs are very sensitive to noise fluctuations on the power and ground rails. In this paper...
—A 25MHz all-CMOS clock generator is demonstrated where measured performance makes it suitable for direct replacement of the reference crystal oscillator (XO) for serial wire int...
Michael S. McCorquodale, Scott M. Pernia, Sundus K...
We proposed a neural segmentation model that is suitable for implementation in analog VLSIs using conventional CMOS technology. The model consists of neural oscillators mutually co...
Gessyca Maria Tovar, Eric Shun Fukuda, Tetsuya Asa...
– A low power all-digital phase locked-loop (ADPLL) in a 0.13um CMOS process is presented. The pulse-based digitally controlled oscillator (PB-DCO) performs a high resolution and...