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ASAP
2008
IEEE
145views Hardware» more  ASAP 2008»
14 years 2 months ago
An MPSoC architecture for the Multiple Target Tracking application in driver assistant system
This article discusses the design of an application specific MPSoC architecture dedicated to Multiple Target Tracking (MTT). This application has its utility in driver assistant s...
Jehangir Khan, Smaïl Niar, Atika Rivenq, Yass...
FPGA
1999
ACM
130views FPGA» more  FPGA 1999»
13 years 12 months ago
Hybrid Product Term and LUT Based Architectures Using Embedded Memory Blocks
The Embedded System Block (ESB) of the APEX20K programmable logic device family from Altera Corporation includes the capability of implementing product term macrocells in addition...
Frank Heile, Andrew Leaver
DATE
2007
IEEE
105views Hardware» more  DATE 2007»
14 years 2 months ago
Scratchpad memories vs locked caches in hard real-time systems: a quantitative comparison
We propose in this paper an algorithm for off-line selection of the contents of on-chip memories. The algorithm supports two types of on-chip memories, namely locked caches and sc...
Isabelle Puaut, Christophe Pais
ISCA
1993
IEEE
153views Hardware» more  ISCA 1993»
13 years 11 months ago
An Adaptive Cache Coherence Protocol Optimized for Migratory Sharing
Parallel programs that use critical sections and are executed on a shared-memory multiprocessor with a writeinvalidate protocol result in invalidation actions that could be elimin...
Per Stenström, Mats Brorsson, Lars Sandberg
NOMS
2010
IEEE
163views Communications» more  NOMS 2010»
13 years 6 months ago
DReaM-Cache: Distributed Real-Time Transaction Memory Cache to support two-factor authentication services and its reliability
—PhoneFactor is a two-factor authentication service that combines the knowledge-based authenticator with an objectbased authenticator in which the object-based authenticator has ...
Haiyang Qian, Chandra Sekhar Surapaneni, Marsh Ray...