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DATE
2010
IEEE
14 years 21 days ago
2010
IEEE
—Time-dependent performance degradation due to transistor aging caused by mechanisms such as Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) is one o...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
: - One of the main bottlenecks when designing a network processing system is very often its memory subsystem. This is mainly due to the state-of-the-art network links operating at...
ICS
1999
Tsinghua U.
13 years 12 months ago
1999
Tsinghua U.
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
HPCA
2007
IEEE
14 years 1 months ago
2007
IEEE
Shared memory multiprocessors play an increasingly important role in enterprise and scientific computing facilities. Remote misses limit the performance of shared memory applicat...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
Some instructions have more impact on processor performance than others. Identification of these critical instructions can be used to modify and improve instruction processing. Pr...