Sciweavers

520 search results - page 6 / 104
» Cache Post-Relational Technology
Sort
View
DSD
2007
IEEE
132views Hardware» more  DSD 2007»
13 years 11 months ago
On-Chip Cache Device Scaling Limits and Effective Fault Repair Techniques in Future Nanoscale Technology
In this study, we investigate different cache fault tolerance techniques to determine which will be most effective when on-chip memory cell defect probabilities exceed those of cu...
David Roberts, Nam Sung Kim, Trevor N. Mudge
ICCD
2005
IEEE
110views Hardware» more  ICCD 2005»
14 years 4 months ago
Implementing Caches in a 3D Technology for High Performance Processors
3D integration is an emergent technology that has the potential to greatly increase device density while simultaneously providing faster on-chip communication. 3D fabrication invo...
Kiran Puttaswamy, Gabriel H. Loh
ASIAMS
2008
IEEE
14 years 1 months ago
Intelligent Web Caching Using Neurocomputing and Particle Swarm Optimization Algorithm
Web caching is a technology for improving network traffic on the internet. It is a temporary storage of Web objects (such as HTML documents) for later retrieval. There are three s...
Sarina Sulaiman, Siti Mariyam Hj. Shamsuddin, Fadn...
ISVLSI
2008
IEEE
156views VLSI» more  ISVLSI 2008»
14 years 1 months ago
Cache Power Reduction in Presence of Within-Die Delay Variation Using Spare Ways
The share of leakage in cache power consumption increases with technology scaling. Choosing a higher threshold voltage (Vth) and/or gate-oxide thickness (Tox) for cache transistor...
Maziar Goudarzi, Tadayuki Matsumura, Tohru Ishihar...