1873 search results - page 320 / 375 » Cache performance for multimedia applications |
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
Transient errors are one of the major reasons for system downtime in many systems. While prior research has mainly focused on the impact of transient errors on datapath, caches an...
CF
2004
ACM
14 years 1 months ago
2004
ACM
The ever increasing gap between processor and memory speed, sometimes referred to as the Memory Wall problem [42], has a very negative impact on performance. This mismatch will be...
MOBIHOC
2004
ACM
14 years 1 months ago
2004
ACM
In this work, we develop an analytical framework to investigate the behavior of the communication links of a node in a random mobility environment. Analytical expressions characte...
PDP
2010
IEEE
13 years 12 months ago
2010
IEEE
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
ASPLOS
2010
ACM
13 years 11 months ago
2010
ACM
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...