Sciweavers

1873 search results - page 42 / 375
» Cache performance for multimedia applications
Sort
View
DAC
2009
ACM
14 years 9 months ago
A DVS-based pipelined reconfigurable instruction memory
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
Zhiguo Ge, Tulika Mitra, Weng-Fai Wong
ICCAD
2001
IEEE
106views Hardware» more  ICCAD 2001»
14 years 5 months ago
System-Level Power/Performance Analysis of Portable Multimedia Systems Communicating over Wireless Channels
This paper presents a new methodology for system-level power and performance analysis of wireless multimedia systems. More precisely, we introduce an analytical approach based on ...
Radu Marculescu, Amit Nandi, Luciano Lavagno, Albe...
WISE
2002
Springer
14 years 1 months ago
An Update-Risk Based Approach to TTL Estimation in Web Caching
Web caching is an important technique for accelerating web applications and reducing the load on the web server and the network through local cache accesses. As in the traditional...
Jeong-Joon Lee, Kyu-Young Whang, Byung Suk Lee, Ji...
MICRO
2006
IEEE
162views Hardware» more  MICRO 2006»
14 years 2 months ago
Adaptive Caches: Effective Shaping of Cache Behavior to Workloads
We present and evaluate the idea of adaptive processor cache management. Specifically, we describe a novel and general scheme by which we can combine any two cache management alg...
Ranjith Subramanian, Yannis Smaragdakis, Gabriel H...
PLDI
2010
ACM
14 years 1 months ago
Software data spreading: leveraging distributed caches to improve single thread performance
Single thread performance remains an important consideration even for multicore, multiprocessor systems. As a result, techniques for improving single thread performance using mult...
Md Kamruzzaman, Steven Swanson, Dean M. Tullsen