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DAC
2006
ACM
16 years 9 hour ago
Use of C/C++ models for architecture exploration and verification of DSPs
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
David Brier, Raj S. Mitra
CODES
2003
IEEE
15 years 11 months ago
A fast parallel reed-solomon decoder on a reconfigurable architecture
This paper presents a software implementation of a very fast parallel Reed-Solomon decoder on the second generation of MorphoSys reconfigurable computation platform, which is targ...
Arezou Koohi, Nader Bagherzadeh, Chengzi Pan
FCCM
2000
IEEE
148views VLSI» more  FCCM 2000»
15 years 10 months ago
An Adaptive Cryptographic Engine for IPSec Architectures
Architectures that implement the Internet Protocol Security (IPSec) standard have to meet the enormous computing demands of cryptographic algorithms. In addition, IPSec architectu...
Andreas Dandalis, Viktor K. Prasanna, José ...
TVLSI
2002
130views more  TVLSI 2002»
15 years 5 months ago
HW/SW codesign techniques for dynamically reconfigurable architectures
Abstract--Hardward/software (HW/SW) codesign and reconfigurable computing are commonly used methodologies for digitalsystems design. However, no previous work has been carried out ...
Juanjo Noguera, Rosa M. Badia
CIDR
2011
234views Algorithms» more  CIDR 2011»
14 years 9 months ago
SWissBox: An Architecture for Data Processing Appliances
Database appliances offer fully integrated hardware, storage, operating system, database, and related software in a single package. Database appliances have a relatively long hist...
Gustavo Alonso, Donald Kossmann, Timothy Roscoe