6167 search results - page 1157 / 1234 » Can Refinement be Automated |
DAC
2009
ACM
14 years 11 months ago
2009
ACM
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...
DAC
2009
ACM
14 years 11 months ago
2009
ACM
Post-silicon processor debugging is frequently carried out in a loop consisting of several iterations of the following two key steps: (i) processor execution for some duration, fo...
DAC
2009
ACM
14 years 11 months ago
2009
ACM
This paper presents a technique to improve the storage density of spin-torque transfer (STT) magnetoresistive random access memory (MRAM) in the presence of significant magnetic t...
DAC
2008
ACM
14 years 11 months ago
2008
ACM
Hardware accelerators are common in embedded systems that have high performance requirements but must still operate within stringent energy constraints. To facilitate short time-t...
DAC
2008
ACM
14 years 11 months ago
2008
ACM
In this paper, we present ELIAD, an efficient lithography aware detailed router to optimize silicon image after optical proximity correction (OPC) in a correct-by-construction man...