60 search results - page 4 / 12 » Carbon nanotube transistor circuits: models and tools for de... |
FDL
2008
IEEE
14 years 3 months ago
2008
IEEE
—This paper introduces a novel numerical carbon nanotube transistor (CNT) modelling approach which brings in a flexible and efficient cubic spline non-linear approximation of t...
CF
2004
ACM
14 years 1 months ago
2004
ACM
Nanoelectronics research has primarily focused on devices. By contrast, not much has been published on innovations at higher layers: we know little about how to construct circuits...
SBCCI
2005
ACM
14 years 2 months ago
2005
ACM
In this work the design of radiofrequency CMOS circuit blocks in the 910MHz ISM band, while biasing the MOS transistor in the moderate inversion region, is analyzed. An amplifier ...
GLVLSI
2010
IEEE
14 years 1 months ago
2010
IEEE
This paper investigates read-out schemes for a crossbar memory using CNTFET-based elements as cross-points. Two read-out schemes are presented in this paper; the first scheme bias...
DATE
2002
IEEE
14 years 1 months ago
2002
IEEE
Transistor tapering is a widely used technique applied to optimize the geometries of CMOS transistors in highperformance circuit design with a view to minimizing the delay of a FE...