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» Challenges in Physical Chip Design
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DAC
1991
ACM
14 years 7 days ago
REX - A VLSI Parasitic Extraction Tool for Electromigration and Signal Analysis
REX is a program that extracts parasitic resistance and capacitance values for nodes in VLSI layouts. REX also performs network serial and parallel simplifications. Two types of n...
Jerry P. Hwang
IPPS
2009
IEEE
14 years 3 months ago
Unit disk graph and physical interference model: Putting pieces together
Modeling communications in wireless networks is a challenging task since it asks for a simple mathematical object on which efficient algorithms can be designed, but that must also...
Emmanuelle Lebhar, Zvi Lotker
ASSETS
2005
ACM
13 years 10 months ago
Toward Goldilocks' pointing device: determining a "just right" gain setting for users with physical impairments
We designed and evaluated an agent that recommends a pointing device gain for a given user, with mixed success. 12 participants with physical impairments used the Input Device Age...
Heidi Horstmann Koester, Edmund F. LoPresti, Richa...
ESCIENCE
2006
IEEE
14 years 12 days ago
The Design and Implementation of the Transatlantic Mission-Oriented Production and Experimental Networks
In this paper we present the design and implementation of the mission-oriented USLHCNet for HEP research community and the UltraLight network testbed. The design philosophy for th...
Harvey B. Newman, Dimitri Bourilkov, Julian J. Bun...
ICCAD
2005
IEEE
123views Hardware» more  ICCAD 2005»
14 years 5 months ago
Hybrid CMOS/nanoelectronic digital circuits: devices, architectures, and design automation
Abstract— Physics offers several active devices with nanometerscale footprint, which can be best used in combination with a CMOS subsystem. Such hybrid circuits offer the potenti...
André DeHon, Konstantin Likharev