658 search results - page 7 / 132 » Challenges in Physical Chip Design |
DAC
2004
ACM
14 years 2 months ago
2004
ACM
A Module-Rased design flow for digital ICs with hard and sofl modules is presented. Versions of the sofl modules are implemented with different areddelay characteristics. The vers...
ASPDAC
2007
ACM
14 years 19 days ago
2007
ACM
- Two challenges for the accurate prediction of GHz CMOS analog/RF building blocks are presented. Challenging the usage of new compact MOSFET models enhances the simulation accurac...
ASPDAC
2006
ACM
14 years 2 months ago
2006
ACM
- Renesas Technology Corp. designers turned to OpenAccess to address the major design challenges with systems on chip for the automotive, wireless, digital consumer and industrial ...
ICCAD
2004
IEEE
14 years 5 months ago
2004
IEEE
—In this paper, we present a new block budgeting algorithm which speeds up timing closure in timing driven hierarchical flows. After a brief description of the addressed flow, ...
ASPDAC
2000
ACM
14 years 1 months ago
2000
ACM
Abstract - In this paper, we propose the concept of System-InPackage (SIP) as a generalization of System-On-Chip (SOC). System-In-Package overcomes formidable integration barriers ...