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ICPADS
2005
IEEE
14 years 2 months ago
Minimizing Energy via Loop Scheduling and DVS for Multi-Core Embedded Systems
Low energy consumptions are extremely important in real-time embedded systems, and scheduling is one of the techniques used to obtain lower energy consumptions. In this paper, we ...
Ying Chen, Zili Shao, Qingfeng Zhuge, Chun Xue, Bi...
DATE
2005
IEEE
151views Hardware» more  DATE 2005»
14 years 2 months ago
Multithreaded Extension to Multicluster VLIW Processors for Embedded Applications
Instruction Level Parallelism (ILP) extraction for multicluster VLIW processors is a very hard task. In this paper, we propose a retargetable architecture that can exploit ILP and...
Domenico Barretta, William Fornaciari, Mariagiovan...
ISSAC
2007
Springer
132views Mathematics» more  ISSAC 2007»
14 years 2 months ago
Adaptive loops with kaapi on multicore and grid: applications in symmetric cryptography
The parallelization of two applications in symmetric cryptography is considered: block ciphering and a new method based on random sampling for the selection of basic substitution ...
Vincent Danjean, Roland Gillard, Serge Guelton, Je...
DATE
2008
IEEE
153views Hardware» more  DATE 2008»
14 years 2 months ago
An Optimized Message Passing Framework for Parallel Implementation of Signal Processing Applications
Novel reconfigurable computing platforms enable efficient realizations of complex signal processing applications by allowing exploitation of parallelization resulting in high thro...
Sankalita Saha, Jason Schlessman, Sebastian Puthen...
FPL
2009
Springer
117views Hardware» more  FPL 2009»
14 years 1 months ago
Data parallel FPGA workloads: Software versus hardware
Commercial soft processors are unable to effectively exploit the data parallelism present in many embedded systems workloads, requiring FPGA designers to exploit it (laboriously) ...
Peter Yiannacouras, J. Gregory Steffan, Jonathan R...