38 search results - page 4 / 8 » Characterizing non-deterministic circuit size |
GLVLSI
2008
IEEE
14 years 5 months ago
2008
IEEE
With the scaling down of the CMOS technologies, Negative Bias Temperature Instability (NBTI) has become a major concern due to its impact on PMOS transistor aging process and the ...
DATE
2004
IEEE
14 years 2 months ago
2004
IEEE
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. Noise analysis techniques can detect some of such noise faults, but accu...
DAGSTUHL
2007
14 years 9 days ago
2007
In this paper, we prove that the quadratic polynomials modulo 3 with the largest correlation with parity are unique up to permutation of variables and constant factors. As a conseq...
SBCCI
2003
ACM
14 years 4 months ago
2003
ACM
As we scale down to deep submicron (DSM) technology, noise is becoming a metric of equal importance as power, speed, and area. Smaller feature sizes, low voltage, and high frequen...
VLSID
2004
IEEE
14 years 11 months ago
2004
IEEE
{A new low-power design method produces CMOS circuits that consume the least dynamic power at the highest speed permitted under the technology constraint. A gate is characterized b...