35 search results - page 4 / 7 » Characterizing the branch misprediction penalty |
ISCA
2005
IEEE
14 years 29 days ago
2005
IEEE
This paper presents a hardware-based dynamic optimizer that continuously optimizes an application’s instruction stream. In continuous optimization, dataflow optimizations are p...
ISCA
1998
IEEE
13 years 11 months ago
1998
IEEE
Control-flow misprediction penalties are a major impediment to high performance in wide-issue superscalar processors. In this paper we present Selective Eager Execution (SEE), an ...
PODS
2002
ACM
14 years 7 months ago
2002
ACM
We consider the fundamental operation of applying a conjunction of selection conditions to a set of records. With large main memories available cheaply, systems may choose to keep...
CTRSA
2007
Springer
14 years 1 months ago
2007
Springer
This paper announces a new software side-channel attack — enabled by the branch prediction capability common to all modern highperformance CPUs. The penalty paid (extra clock cyc...
HPCA
2007
IEEE
14 years 7 months ago
2007
IEEE
If-conversion is a compiler technique that reduces the misprediction penalties caused by hard-to-predict branches, transforming control dependencies into data dependencies. Althou...