Sciweavers

230 search results - page 12 / 46
» Checkpointing Aided Parallel Execution Model and Analysis
Sort
View
DAC
2005
ACM
13 years 9 months ago
VLIW: a case study of parallelism verification
Parallelism in processor architecture and design imposes a verification challenge as the exponential growth in the number of execution combinations becomes unwieldy. In this paper...
Allon Adir, Yaron Arbetman, Bella Dubrov, Yossi Li...
HPCA
2006
IEEE
14 years 7 months ago
Completely verifying memory consistency of test program executions
An important means of validating the design of commercial-grade shared memory multiprocessors is to run a large number of pseudo-random test programs on them. However, when intent...
Chaiyasit Manovit, Sudheendra Hangal
OSDI
2008
ACM
13 years 9 months ago
DryadLINQ: A System for General-Purpose Distributed Data-Parallel Computing Using a High-Level Language
DryadLINQ is a system and a set of language extensions that enable a new programming model for large scale distributed computing. It generalizes previous execution environments su...
Yuan Yu, Michael Isard, Dennis Fetterly, Mihai Bud...
IEEEPACT
2006
IEEE
14 years 1 months ago
A two-phase escape analysis for parallel java programs
Thread escape analysis conservatively determines which objects may be accessed in more than one thread. Thread escape analysis is useful for a variety of purposes – finding rac...
Kyungwoo Lee, Samuel P. Midkiff
ISSS
2002
IEEE
106views Hardware» more  ISSS 2002»
14 years 10 days ago
Modeling Assembly Instruction Timing in Superscalar Architectures
This paper proposes an original model of the execution time of assembly instructions in superscalar architectures. The approach is based on a rigorous mathematical model and provi...
William Fornaciari, Vito Trianni, Carlo Brandolese...