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ATS
2009
IEEE
99views Hardware» more  ATS 2009»
14 years 2 months ago
Test Generation for Designs with On-Chip Clock Generators
High performance designs often use the on-chip device PLLs for accurate test clock generation during testing. The on-chip clock generator is designed in a programmable way to faci...
Xijiang Lin, Mark Kassab
JOC
2011
104views more  JOC 2011»
12 years 11 months ago
On the Security of Oscillator-Based Random Number Generators
Physical random number generators (a.k.a. TRNGs) appear to be critical components of many cryptographic systems. Yet, such building blocks are still too seldom provided with a form...
Mathieu Baudet, David Lubicz, Julien Micolod, Andr...
ICDE
2009
IEEE
171views Database» more  ICDE 2009»
14 years 2 months ago
CoTS: A Scalable Framework for Parallelizing Frequency Counting over Data Streams
Applications involving analysis of data streams have gained significant popularity and importance. Frequency counting, frequent elements and top-k queries form a class of operato...
Sudipto Das, Shyam Antony, Divyakant Agrawal, Amr ...
GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
14 years 1 months ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...
DATE
2010
IEEE
153views Hardware» more  DATE 2010»
13 years 6 months ago
Heterogeneous vs homogeneous MPSoC approaches for a Mobile LTE modem
— Applications like 4G baseband modem require single-chip implementation to meet the integration and power consumption requirements. These applications demand a high computing pe...
Camille Jalier, Didier Lattard, Ahmed Amine Jerray...