509 search results - page 23 / 102 » Chip Multi-Processor Generator |
TCAD
2008
13 years 8 months ago
2008
The verification of a system-on-chip is challenging due to its high level of integration. Multiple components in a system can behave concurrently and compete for resources. Hence, ...
NIPS
1996
13 years 9 months ago
1996
A one-dimensional, visual tracking chip has been implemented using neuromorphic,analog VLSI techniques to modelselective visual attention in the control of saccadic and smooth pur...
ISCA
2011
IEEE
12 years 11 months ago
2011
IEEE
Since 2005, processor designers have increased core counts to exploit Moore’s Law scaling, rather than focusing on single-core performance. The failure of Dennard scaling, to wh...
ICCD
2008
IEEE
14 years 5 months ago
2008
IEEE
—This paper addresses the problem of chip level thermal profile estimation using runtime temperature sensor readings. We address the challenges of a) availability of only a few t...
VLSID
2004
IEEE
14 years 8 months ago
2004
IEEE
In this paper, we describe NoCGEN, a Network On Chip (NoC) generator, which is used to create a simulatable and synthesizable NoC description. NoCGEN uses a set of modularised rou...