509 search results - page 51 / 102 » Chip Multi-Processor Generator |
100
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ICRA
2005
IEEE
15 years 8 months ago
2005
IEEE
– We describe in detail the behavior of an inhibitory Central Pattern Generator (CPG) network for robot control. A four-neuron, mutual inhibitory network forms the basic coordina...
143
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ISCA
2011
IEEE
14 years 6 months ago
2011
IEEE
A growing body of work has compiled a strong case for the single-ISA heterogeneous multi-core paradigm. A single-ISA heterogeneous multi-core provides multiple, differently-design...
185
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CF
2011
ACM
14 years 2 months ago
2011
ACM
Dynamic Information Flow Tracking (DIFT) is a powerful technique that can protect unmodified binaries from a broad range of vulnerabilities such as buffer overflow and code inj...
108
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FPL
2007
Springer
15 years 8 months ago
2007
Springer
Reconfigurable computing entails the utilization of a generalpurpose processor augmented with a reconfigurable hardware structure (usually an FPGA). Normally, a complete recon...
151
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FPL
2010
Springer
15 years 10 days ago
2010
Springer
Significant advances in the field of configurable computing have enabled parallel processing within a single FieldProgrammable Gate Array (FPGA) chip. This paper presents the imple...