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BMCBI
2008
162views more  BMCBI 2008»
13 years 8 months ago
Background correction using dinucleotide affinities improves the performance of GCRMA
Background: High-density short oligonucleotide microarrays are a primary research tool for assessing global gene expression. Background noise on microarrays comprises a significan...
Raad Z. Gharaibeh, Anthony Fodor, Cynthia Gibas
DAC
2002
ACM
14 years 8 months ago
Software synthesis from synchronous specifications using logic simulation techniques
This paper addresses the problem of automatic generation of implementation software from high-level functional specifications in the context of embedded system on chip designs. So...
Yunjian Jiang, Robert K. Brayton
ICCD
2000
IEEE
99views Hardware» more  ICCD 2000»
14 years 4 months ago
Self-Calibrating Clocks for Globally Asynchronous Locally Synchronous Systems
We present a local clocking mechanism based on a tunable delay line which calibrates itself from a low frequency global clock. After initial tuning, the local clock remains calibr...
Simon W. Moore, George S. Taylor, Paul A. Cunningh...
IESS
2007
Springer
143views Hardware» more  IESS 2007»
14 years 2 months ago
Embedded Software Development in a System-Level Design Flow
Abstract System level design is considered a major approach to tackle the complexity of modern System-on-Chip designs. Embedded software within SoCs is gaining importance as it add...
Gunar Schirner, Gautam Sachdeva, Andreas Gerstlaue...
ISLPED
2005
ACM
110views Hardware» more  ISLPED 2005»
14 years 1 months ago
Complexity reduction in an nRERL microprocessor
We describe an adiabatic microprocessor implemented with a reversible logic, nRERL [1]. We employed an 8-phase clocked power instead of 6-phase one to reduce the number of buffers...
Seokkee Kim, Soo-Ik Chae