56 search results - page 8 / 12 » Chip and PIN is Broken |
ASPDAC
2007
ACM
13 years 12 months ago
2007
ACM
This paper proposes Noise-Direct, a design methodology for power integrity aware floorplanning, using microarchitectural feedback to guide module placement. Stringent power constr...
23
Voted
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—Today, many chips are designed with predefined discrete cell libraries. In this paper we present a new fast gate sizing algorithm that works natively with discrete cell choices...
FC
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. The Chip Authentication Programme (CAP) has been introduced by banks in Europe to deal with the soaring losses due to online banking fraud. A handheld reader is used toge...
ITC
1998
IEEE
14 years 3 days ago
1998
IEEE
The main objective of core-based IC design is improvement of design efficiency and time-to-market. In order to prevent test development from becoming the bottleneck in the entire ...
DAC
1995
ACM
13 years 11 months ago
1995
ACM
In this paper we present a set cover based approach (SCP) to multi-way partitioning for minimum delay for Look-Up Table based FPGAs. SCP minimizes the number of chip-crossings on ...