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ISCAS
2006
IEEE
122views Hardware» more  ISCAS 2006»
14 years 2 months ago
256-channel integrated neural interface and spatio-temporal signal processor
Abstract- We present an architecture and VLSI implemen- Various strategies in the analysis of spatio-temporal dynamtation of a distributed neural interface and spatio-temporal ics ...
J. N. Y. Aziz, Roman Genov, B. R. Bardakjian, M. D...
ISCC
2006
IEEE
190views Communications» more  ISCC 2006»
14 years 2 months ago
Time-Critical Underwater Sensor Diffusion with No Proactive Exchanges and Negligible Reactive Floods
— In this paper we study multi-hop ad hoc routing in a scalable Underwater Sensor Network (UWSN), which is a novel network paradigm for ad hoc investigation of the world below th...
Uichin Lee, Jiejun Kong, Joon-Sang Park, Eugenio M...
MICRO
2006
IEEE
84views Hardware» more  MICRO 2006»
14 years 2 months ago
Reunion: Complexity-Effective Multicore Redundancy
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
Jared C. Smolens, Brian T. Gold, Babak Falsafi, Ja...
ADBIS
2006
Springer
93views Database» more  ADBIS 2006»
14 years 2 months ago
An On-Line Reorganization Framework for SAN File Systems
While the cost per megabyte of magnetic disk storage is economical, organizations are alarmed by the increasing cost of managing storage. Storage Area Network (SAN) architectures ...
Shahram Ghandeharizadeh, Shan Gao, Chris Gahagan, ...
ANCS
2006
ACM
14 years 2 months ago
Localized asynchronous packet scheduling for buffered crossbar switches
Buffered crossbar switches are a special type of crossbar switches. In such a switch, besides normal input queues and output queues, a small buffer is associated with each crosspo...
Deng Pan, Yuanyuan Yang