90 search results - page 5 / 18 » Clock distribution using multiple voltages |
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
A low-power output feedback controlled frequency synthesizer. Our proposed circuit can be used for low-power multiplier is proposed for Delay Locked Loop (DLL) based application an...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...
ISQED
2005
IEEE
14 years 2 months ago
2005
IEEE
— Multiple power supply voltages are often used in modern high performance ICs such as microprocessors to decrease power consumption without affecting circuit speed. The system o...
ISMVL
2000
IEEE
14 years 1 months ago
2000
IEEE
We present a novel multiple-threshold circuit using resonant-tunneling diodes (RTDs). The logic operation is based on detecting a switching sequence in the RTD circuit. This schem...
ASPDAC
2005
ACM
14 years 2 months ago
2005
ACM
－In high performance systems, process variations and fluctuations of operating environments have significant impact on the clock skew. Recently, hybrid structures of H-tree and m...