96 search results - page 5 / 20 » Clock-Aware Placement for FPGAs |
ERSA
2010
13 years 5 months ago
2010
A major focus within the Integrated Chip (IC) industry is reducing power consumption of devices. In this paper, we explore the idea of persistent CAD algorithms that constantly imp...
IPPS
2003
IEEE
14 years 19 days ago
2003
IEEE
Partial reconfiguration allows for mapping and executing several tasks on an FPGA during runtime. Multitasking on FPGAs raises a number of questions on the management of the reco...
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
In this paper, we utilize Rent’s rule as an empirical measure for efficient clustering and placement of circuits on hierarchical FPGAs. We show that careful matching of design c...
DAC
2003
ACM
14 years 18 days ago
2003
ACM
In this paper we propose a partitioning-based placement algorithm for FPGAs. The method incorporates simple, but effective heuristics that target delay minimization. The placement...
DATE
2010
IEEE
14 years 13 days ago
2010
IEEE
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...