82 search results - page 9 / 17 » Clockless IC design using handshake technology |
DATE
2003
IEEE
14 years 3 months ago
2003
IEEE
Test is often seen as a necessary evil; it is a fact of life that ICs have manufacturing defects and those need to be filtered out by testing before the ICs are shipped to the cu...
ICCD
2005
IEEE
14 years 6 months ago
2005
IEEE
As technology scales, interconnects dominate the performance and power behavior of deep submicron designs. Three-dimensional integrated circuits (3D ICs) have been proposed as a w...
ASYNC
2000
IEEE
14 years 2 months ago
2000
IEEE
This paper introduces several new asynchronous pipeline designs which offer high throughput as well as low latency. The designs target dynamic datapaths, both dualrail as well as ...
ICS
1999
Tsinghua U.
14 years 2 months ago
1999
Tsinghua U.
Supercomputer performance is highly dependent on its interconnection subsystem design. In this paper we study how di erent architectural approaches for router design impact into s...
TVLSI
1998
13 years 9 months ago
1998
— Wave-pipelining is a method of high-performance circuit design which implements pipelining in logic without the use of intermediate latches or registers. The combination of hig...