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SAC
2005
ACM
14 years 29 days ago
A code compression advisory tool for embedded processors
We present a tool which is designed to be used as a code compression advisory system for object code to be run on an embedded processor. All the compression schemes support run-ti...
Sreejith K. Menon, Priti Shankar
ICCD
1999
IEEE
110views Hardware» more  ICCD 1999»
13 years 11 months ago
TriMedia CPU64 Architecture
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-J...
ISSS
1995
IEEE
87views Hardware» more  ISSS 1995»
13 years 11 months ago
Industrial experience using rule-driven retargetable code generation for multimedia applications
The increasing usage of Application Specific Instruction Set Processors (ASIPs) in audio and video telecommunications has made strong demands on the rapid availability of dedicat...
Clifford Liem, Pierre G. Paulin, Marco Cornero, Ah...
ICCD
2006
IEEE
185views Hardware» more  ICCD 2006»
14 years 4 months ago
An accurate Energy estimation framework for VLIW Processor Cores
— In this paper, we present a comprehensive energy estimation framework for software executing on Very Long Instruction Word (VLIW) processor cores. The proposed energy model is ...
Sourav Roy, Rajat Bhatia, Ashish Mathur
MICRO
2003
IEEE
147views Hardware» more  MICRO 2003»
14 years 20 days ago
Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...
Enric Gibert, F. Jesús Sánchez, Anto...