966 search results - page 152 / 194 » Code Generation for Embedded Processors |
CODES
2007
IEEE
14 years 3 months ago
2007
IEEE
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
EUSAI
2004
Springer
14 years 2 months ago
2004
Springer
Abstract. To realise an Ambient Intelligence environment, it is paramount that applications can dispose of information about the context in which they operate, preferably in a very...
ARC
2010
Springer
13 years 9 months ago
2010
Springer
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
MICRO
2003
IEEE
14 years 2 months ago
2003
IEEE
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...
ATS
2010
IEEE
13 years 6 months ago
2010
IEEE
In the conventional ADC production test method, a high-quality analogue sine wave is applied to the Analogue-toDigital Converter (ADC), which is expensive to generate. Nowadays, an...