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» Code Generation for Embedded Processors
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ISSS
1999
IEEE
85views Hardware» more  ISSS 1999»
14 years 1 months ago
Efficient Scheduling of DSP Code on Processors with Distributed Register Files
Code generation methods for digital signal processors are increasingly hampered by the combination of tight timing constraints imposed by the algorithms and the limited capacity o...
Bart Mesman, Carlos A. Alba Pinto, Koen Van Eijk
TVLSI
2002
98views more  TVLSI 2002»
13 years 8 months ago
Minimizing memory access energy in embedded systems by selective instruction compression
We propose a technique for reducing the energy spent in the memory-processor interface of an embedded system during the execution of firmware code. The method is based on the idea ...
Luca Benini, Alberto Macii, Enrico Macii, Massimo ...
DAC
2002
ACM
14 years 9 months ago
Schedulability of event-driven code blocks in real-time embedded systems
Many real-time embedded systems involve a collection of independently executing event-driven code blocks, having hard real-time constraints. Tasks in many such systems, like netwo...
Samarjit Chakraborty, Thomas Erlebach, Simon K&uum...
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
14 years 5 months ago
Code Placement with Selective Cache Activity Minimization for Embedded Real-time Software Design
– Many embedded system designs usually impose (hard) read-time constraints on tasks. Thus, computing a tight upper bound of the worst case execution time (WCET) of a software is ...
Junhyung Um, Taewhan Kim
CASES
2006
ACM
14 years 2 months ago
Adaptive and flexible dictionary code compression for embedded applications
Dictionary code compression is a technique where long instructions in the memory are replaced with shorter code words used as index in a table to look up the original instructions...
Mats Brorsson, Mikael Collin