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» Code Generation for Embedded Processors
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DAC
2008
ACM
13 years 10 months ago
Protecting bus-based hardware IP by secret sharing
Our work addresses protection of hardware IP at the mask level with the goal of preventing unauthorized manufacturing. The proposed protocol based on chip locking and activation i...
Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov
ASPDAC
2007
ACM
121views Hardware» more  ASPDAC 2007»
14 years 26 days ago
Approximation Algorithm for Process Mapping on Network Processor Architectures
The high performance requirements of networking applications has led to the advent of programmable network processor (NP) architectures that incorporate symmetric multiprocessing, ...
Christopher Ostler, Karam S. Chatha, Goran Konjevo...
RECOSOC
2007
116views Hardware» more  RECOSOC 2007»
13 years 10 months ago
IBC-EI: An Instruction Based Compression method with Encryption and Integrity Checking
Code Compression has been shown to be efficient in minimizing the memory requirements for embedded systems as well as in power consumption reduction and performance improvement. I...
Eduardo Wanderley Netto, Reouven Elbaz, Lionel Tor...
DAC
2004
ACM
14 years 9 months ago
Multi-profile based code compression
Code compression has been shown to be an effective technique to reduce code size in memory constrained embedded systems. It has also been used as a way to increase cache hit ratio...
Eduardo Wanderley Netto, Rodolfo Azevedo, Paulo Ce...
WORDS
2002
IEEE
14 years 1 months ago
Writing Temporally Predictable Code
The Worst-Case Execution-Time Analysis (WCET Analysis) of program code that is to be executed on modern processors is a highly complex task. First, it involves path analysis, to i...
Peter P. Puschner, Alan Burns