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ICCAD
1994
IEEE
105views Hardware» more  ICCAD 1994»
14 years 1 months ago
Register assignment through resource classification for ASIP microcode generation
Application Specific Instruction-Set Processors (ASIPs) offer designers the ability for high-speed data and control processing with the added flexibility needed for late design sp...
Clifford Liem, Trevor C. May, Pierre G. Paulin
IPPS
2002
IEEE
14 years 1 months ago
Generalized Multipartitioning for Multi-Dimensional Arrays
Multipartitioning is a strategy for parallelizing computations that require solving 1D recurrences along each dimension of a multi-dimensional array. Previous techniques for multi...
Daniel G. Chavarría-Miranda, Alain Darte, R...
SAMOS
2005
Springer
14 years 2 months ago
Automatic FIR Filter Generation for FPGAs
This paper presents a new tool for the automatic generation of highly parallelized Finite Impulse Response (FIR) filters. In this approach we follow our PARO design methodology. P...
Holger Ruckdeschel, Hritam Dutta, Frank Hannig, J&...
DATE
2008
IEEE
91views Hardware» more  DATE 2008»
14 years 3 months ago
Integrating RTL IPs into TLM Designs Through Automatic Transactor Generation
Transaction Level Modeling (TLM) is an emerging design practice for overcoming increasing design complexity. It aims at simplifying the design flow of embedded systems ning and v...
Nicola Bombieri, Nicola Deganello, Franco Fummi
ENTCS
2010
102views more  ENTCS 2010»
13 years 3 months ago
Test Case Generation for Adequacy of Floating-point to Fixed-point Conversion
Porting an application written for personal computer to embedded devices requires conversion of floating-point numbers and operations into fixed-point ones. Testing the conversion...
Tuan-Hung Pham, Anh-Hoang Truong, Wei-Ngan Chin, T...