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ICCD
2001
IEEE
110views Hardware» more  ICCD 2001»
14 years 4 months ago
Low-Energy DSP Code Generation Using a Genetic Algorithm
This paper deals with low-energy code generation for a highly optimized digital signal processor designed for mobile communication applications. We present a genetic algorithm bas...
Markus Lorenz, Rainer Leupers, Peter Marwedel, Tho...
JSW
2007
126views more  JSW 2007»
13 years 7 months ago
Efficient Evaluation of Multiple-Output Boolean Functions in Embedded Software or Firmware
— The paper addresses software and firmware implementation of multiple-output Boolean functions based on cascades of Look-Up Tables (LUTs). A LUT cascade is described as a means ...
Vaclav Dvorak
VLSID
1999
IEEE
97views VLSI» more  VLSID 1999»
13 years 12 months ago
Improving Area Efficiency of Residue Number System based Implementation of DSP Algorithms
Residue Number System based applications involve modulo-arithmetic which is typically implemented using look-up-tables (LUTs) for a small value of modulus. In this paper, we prese...
M. N. Mahesh, Satrajit Gupta, Mahesh Mehendale
IPPS
2002
IEEE
14 years 18 days ago
A SIMD Vectorizing Compiler for Digital Signal Processing Algorithms
Short vector SIMD instructions on recent microprocessors, such as SSE on Pentium III and 4, speed up code but are a major challenge to software developers. We present a compiler t...
Franz Franchetti, Markus Püschel
CASES
2005
ACM
13 years 9 months ago
Optimizing stream programs using linear state space analysis
Digital Signal Processing (DSP) is becoming increasingly widespread in portable devices. Due to harsh constraints on power, latency, and throughput in embedded environments, devel...
Sitij Agrawal, William Thies, Saman P. Amarasinghe