63 search results - page 11 / 13 » Code Size Optimization for Embedded Processors using Commuta... |
TJS
2002
13 years 7 months ago
2002
Historically, compilers have operated by applying a fixed set of optimizations in a predetermined order. We call such an ordered list of optimizations a compilation sequence. This...
ICS
2009
Tsinghua U.
14 years 2 months ago
2009
Tsinghua U.
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
IESS
2007
Springer
14 years 1 months ago
2007
Springer
To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation...
ASPDAC
2004
ACM
14 years 27 days ago
2004
ACM
— The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the ...
CASES
2006
ACM
14 years 1 months ago
2006
ACM
The architectural design of embedded systems is becoming increasingly idiosyncratic to meet varying constraints regarding energy consumption, code size, and execution time. Tradit...