135 search results - page 5 / 27 » Code and Data Transformations for Improving Shared Cache Per... |
LCTRTS
2010
Springer
14 years 6 days ago
2010
Springer
Continuous technology scaling has brought us to a point, where transistors have become extremely susceptible to cosmic radiation strikes, or soft errors. Inside the processor, cac...
DATE
2003
IEEE
14 years 22 days ago
2003
IEEE
The widening gap between processor and memory speeds renders data locality optimization a very important issue in data-intensive embedded applications. Throughout the years hardwa...
EUROPAR
2003
Springer
14 years 20 days ago
2003
Springer
As compared to a complex single processor based system, on-chip multiprocessors are less complex, more power efficient, and easier to test and validate. In this work, we focus on a...
IEEEPACT
2009
IEEE
2009
IEEE
Soft-OLP: Improving Hardware Cache Performance through Software-Controlled Object-Level Partitioning
14 years 2 months ago
—Performance degradation of memory-intensive programs caused by the LRU policy’s inability to handle weaklocality data accesses in the last level cache is increasingly serious ...
ICPP
2009
IEEE
14 years 2 months ago
2009
IEEE
Memory-intensive threads can hoard shared resources without making progress on a multithreading processor (SMT), thereby hindering the overall system performance. A recent promisi...