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137
Voted
CODES
2007
IEEE
15 years 8 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
125
Voted
CODES
2008
IEEE
15 years 8 months ago
Speculative DMA for architecturally visible storage in instruction set extensions
Instruction set extensions (ISEs) can accelerate embedded processor performance. Many algorithms for ISE generation have shown good potential; some of them have recently been expa...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...
135
Voted
SPAA
2003
ACM
15 years 7 months ago
The effect of communication costs in solid-state quantum computing architectures
Quantum computation has become an intriguing technology with which to attack difficult problems and to enhance system security. Quantum algorithms, however, have been analyzed un...
Dean Copsey, Mark Oskin, Tzvetan S. Metodi, Freder...