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» Collaborative Routing Architecture for FPGA
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DAC
2003
ACM
14 years 22 days ago
Fast timing-driven partitioning-based placement for island style FPGAs
In this paper we propose a partitioning-based placement algorithm for FPGAs. The method incorporates simple, but effective heuristics that target delay minimization. The placement...
Pongstorn Maidee, Cristinel Ababei, Kia Bazargan
FCCM
2006
IEEE
162views VLSI» more  FCCM 2006»
14 years 1 months ago
Power Visualization, Analysis, and Optimization Tools for FPGAs
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
Matthew French, Li Wang, Michael J. Wirthlin
ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
14 years 28 days ago
Interconnect capacitance estimation for FPGAs
Abstract—The dynamic power consumed by a digital CMOS circuit is directly proportional to capacitance. In this paper, we consider pre-routing capacitance estimation for FPGAs and...
Jason Helge Anderson, Farid N. Najm
FPL
2008
Springer
125views Hardware» more  FPL 2008»
13 years 9 months ago
Reconfigurable platforms and the challenges for large-scale implementations of spiking neural networks
FPGA devices have witnessed popularity in their use for the rapid prototyping of biological Spiking Neural Network (SNNs) applications, as they offer the key requirement of reconf...
Jim Harkin, Fearghal Morgan, Steve Hall, Piotr Dud...
CONCURRENCY
2008
60views more  CONCURRENCY 2008»
13 years 7 months ago
Steering via the image in local, distributed and collaborative settings
Computational steering is a valuable mechanism for scientific investigation in which the parameters of a running program can be altered and the results visualized immediately. In ...
J. D. Wood, H. Wright