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ANCS
2007
ACM
13 years 11 months ago
Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture
Network-on-Chip (NoC) architectures provide a scalable solution to the wire delay constraints in deep submicron VLSI designs. Recent research into the optimization of NoC architec...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
DFT
2004
IEEE
101views VLSI» more  DFT 2004»
13 years 11 months ago
Designs for Reducing Test Time of Distributed Small Embedded SRAMs
This paper proposes a test architecture aimed at reducing test time of distributed small embedded SRAMs (eSRAMs). This architecture improves the one proposed in [4, 5]. The improv...
Baosheng Wang, Yuejian Wu, André Ivanov
ICSE
2008
IEEE-ACM
14 years 7 months ago
Fostering user-developer collaboration with infrastructure probes
In this paper we present a new variation of cultural probes, called Infrastructure Probes (IP). IPs can be seen as an additional ethnographic method to get a deeper understanding ...
Christian Dörner, Jan Heß, Volkmar Pipe...
ICCD
2007
IEEE
190views Hardware» more  ICCD 2007»
14 years 4 months ago
Hybrid resistor/FET-logic demultiplexer architecture design for hybrid CMOS/nanodevice circuits
Hybrid nanoelectronics are emerging as one viable option to sustain the Moore’s Law after the CMOS scaling limit is reached. One main design challenge in hybrid nanoelectronics ...
Shu Li, Tong Zhang
EUSAI
2003
Springer
14 years 27 days ago
Interaction Design for the Disappearing Computer
This invited talk starts out with a review of the previously developed Roomware® concept and sample prototypes as an approach for designing new forms of interaction and collaborat...
Norbert A. Streitz