39 search results - page 7 / 8 » Communication Centric Architectures for Turbo-Decoding on Em... |
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
Long interconnects are becoming an increasingly important problem from both power and performance perspectives. This motivates designers to adopt on-chip network-based communicati...
IPPS
2000
IEEE
14 years 8 days ago
2000
IEEE
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
LCTRTS
2004
Springer
14 years 1 months ago
2004
Springer
This paper presents Spinach, a new simulator toolset specifically designed to target programmable network interface architectures. Spinach models both system components that are ...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
DAC
2008
ACM
14 years 9 months ago
2008
ACM
Design-time decisions can often only cover certain scenarios and fail in efficiency when hard-to-predict system scenarios occur. This drives the development of run-time adaptive s...