362 search results - page 20 / 73 » Communication Mechanisms for Parallel DSP Systems on a Chip |
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
In this paper, we present a new fault tolerance system called DejaVu for transparent and automatic checkpointing, migration, and recovery of parallel and distributed applications....
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
VLSID
2009
IEEE
14 years 8 months ago
2009
IEEE
The current paradigm of using Cu interconnects for on-chip global communication is rapidly becoming a serious performance bottleneck in ultra-deep submicron (UDSM) technologies. C...
ICCD
2008
IEEE
14 years 4 months ago
2008
IEEE
— Heterogeneous Chip Multiprocessors (HMPs), such as the Cell Broadband Engine, offer a new design optimization opportunity by allowing designers to provide accelerators for appl...
HPCA
2000
IEEE
14 years 9 days ago
2000
IEEE
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...