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» Communication estimation for hardware software codesign
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ICCD
2001
IEEE
112views Hardware» more  ICCD 2001»
14 years 4 months ago
Run-Time Execution of Reconfigurable Hardware in a Java Environment
We present tools that support the runtime execution of applications that mix software running on networks of workstations and reconfigurable hardware. We use JHDL to describe the ...
Laurie A. Smith King, Heather Quinn, Miriam Leeser...
CODES
2003
IEEE
14 years 23 days ago
A codesigned on-chip logic minimizer
Boolean logic minimization is traditionally used in logic synthesis tools running on powerful desktop computers. However, logic minimization has recently been proposed for dynamic...
Roman L. Lysecky, Frank Vahid
ISCAS
2003
IEEE
96views Hardware» more  ISCAS 2003»
14 years 23 days ago
Interface design approach for system on chip based on configuration
Communication synthesis is an essential step in hardware/software co-synthesis: many embedded systems use automatic generation of interface for point to point communication or use...
Issam Maalej, Guy Gogniat, Mohamed Abid, Jean Luc ...
DATE
2009
IEEE
91views Hardware» more  DATE 2009»
13 years 11 months ago
Optimizing the HW/SW boundary of an ECC SoC design using control hierarchy and distributed storage
Abstract--Hardware/Software codesign of Elliptic Curve Cryptography has been extensively studied in recent years. However, most of these designs have focused on the computational a...
Xu Guo, Patrick Schaumont
ASPDAC
2007
ACM
131views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Fast Flip-Chip Pin-Out Designation Respin by Pin-Block Design and Floorplanning for Package-Board Codesign
Deep submicron effects drive the complication in designing chips, as well as in package designs and communications between package and board. As a result, the iterative interface d...
Ren-Jie Lee, Ming-Fang Lai, Hung-Ming Chen