26 search results - page 3 / 6 » Compact hardware design of Whirlpool hashing core |
ASPDAC
2006
ACM
14 years 17 days ago
2006
ACM
- This paper presents a DSP core for multi-core media SoC, which is optimized to execute a set of signal processing tasks very efficiently. The fully-programmable core has a data-c...
MICRO
2008
IEEE
14 years 29 days ago
2008
IEEE
Hardware signatures have been recently proposed as an efficient mechanism to detect conflicts amongst concurrently running transactions in transactional memory systems (e.g., Bulk...
FCCM
2003
IEEE
13 years 12 months ago
2003
IEEE
Two FPGA based implementations of random number generators intended for embedded cryptographic applications are presented. The first is a true random number generator (TRNG) whic...
VLSID
2005
IEEE
14 years 7 months ago
2005
IEEE
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
AHS
2006
IEEE
14 years 20 days ago
2006
IEEE
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...