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CODES
2006
IEEE
14 years 1 months ago
Integrated analysis of communicating tasks in MPSoCs
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
Simon Schliecker, Matthias Ivers, Rolf Ernst
ISPASS
2009
IEEE
14 years 2 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
PPOPP
2009
ACM
14 years 8 months ago
Idempotent work stealing
Load balancing is a technique which allows efficient parallelization of irregular workloads, and a key component of many applications and parallelizing runtimes. Work-stealing is ...
Maged M. Michael, Martin T. Vechev, Vijay A. Saras...
WOSP
2010
ACM
14 years 2 months ago
Reducing performance non-determinism via cache-aware page allocation strategies
Performance non-determinism in computer systems complicates evaluation, use, and even development of these systems. In performance evaluation via benchmarking and simulation, nond...
Michal Hocko, Tomás Kalibera
CODES
2005
IEEE
14 years 1 months ago
Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs
To ensure low power consumption while maintaining flexibility and performance, future Systems-on-Chip (SoC) will combine several types of processor cores and data memory units of...
Anthony Leroy, Paul Marchal, Adelina Shickova, Fra...