20197 search results - page 20 / 4040 » Comparing Computational Power |
DAC
2007
ACM
14 years 8 months ago
2007
ACM
In 90-nm technology, dynamic power is still the largest power source in FPGAs [1], and signal glitches contribute a large portion of the dynamic power consumption. Previous powera...
LCN
2003
IEEE
14 years 26 days ago
2003
IEEE
We evaluate the performance of IP paging with power save mechanism by formulating an analytical model and carrying out simulation study of Integrated IP Paging Protocol (IIPP) tha...
ICPP
2003
IEEE
14 years 26 days ago
2003
IEEE
In chip-multiprocessors (CMPs), the number of cores and the issue width of each core presents an important design trade-off to balance the amount of TLP and ILP between multi-thre...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...
DAC
1999
ACM
13 years 12 months ago
1999
ACM
Dual threshold technique has been proposed to reduce leakage power in low voltage and low power circuits by applying a high threshold voltage to some transistors in non-critical p...