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VLSID
2005
IEEE
89views VLSI» more  VLSID 2005»
14 years 9 months ago
Power Optimization in Current Mode Circuits
We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
M. S. Bhat, H. S. Jamadagni
ISCAS
2007
IEEE
92views Hardware» more  ISCAS 2007»
14 years 3 months ago
A Study on Impact of Leakage Current on Dynamic Power
— Scaling of CMOS technologies has led to dramatic increase in sub-threshold, gate and reverse biased junction band-to-band-tunneling (BTBT) leakage. Leakage current has now beco...
Ashesh Rastogi, Kunal P. Ganeshpure, Sandip Kundu
ASPDAC
2004
ACM
85views Hardware» more  ASPDAC 2004»
14 years 19 days ago
Multi-level placement with circuit schema based clustering in analog IC layouts
This paper aims at developing an automated device-level placement for analog circuit design which achieves comparable quality to manual designs by experts. It extracts a set of cl...
Takashi Nojima, Xiaoke Zhu, Yasuhiro Takashima, Sh...
JCM
2008
242views more  JCM 2008»
13 years 8 months ago
SimANet - A Large Scalable, Distributed Simulation Framework for Ambient Networks
In this paper, we present a new simulation platform for complex, radio standard spanning mobile Ad Hoc networks. SimANet - Simulation Platform for Ambient Networks - allows the coe...
Matthias Vodel, Matthias Sauppe, Mirko Caspar, Wol...
JSS
2006
122views more  JSS 2006»
13 years 8 months ago
Efficient index caching for data dissemination in mobile computing environments
Due to the limited power supply of mobile devices, much research has been done on reducing the power consumption of mobile devices in mobile computing environments. Since supporti...
Jen-Jou Hung, Yungho Leu