We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
— Scaling of CMOS technologies has led to dramatic increase in sub-threshold, gate and reverse biased junction band-to-band-tunneling (BTBT) leakage. Leakage current has now beco...
This paper aims at developing an automated device-level placement for analog circuit design which achieves comparable quality to manual designs by experts. It extracts a set of cl...
In this paper, we present a new simulation platform for complex, radio standard spanning mobile Ad Hoc networks. SimANet - Simulation Platform for Ambient Networks - allows the coe...
Due to the limited power supply of mobile devices, much research has been done on reducing the power consumption of mobile devices in mobile computing environments. Since supporti...