138 search results - page 13 / 28 » Compiled-code-based simulation with timing verification |
DAC
2004
ACM
14 years 8 months ago
2004
ACM
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...
CODES
2004
IEEE
13 years 11 months ago
2004
IEEE
This paper presents an RTOS-centric hardwareisoftware cosimulator which we have developed for embedded system design. One of the most remarkable features in our cosimulator is tha...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
While performance specifications are verified before sign-off for a modern nanometer scale design, extensive application of optical proximity correction substantially alters the l...
RTAS
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper formulates and illustrates the integration of resource safety verification into a design methodology for development of verified and robust real-time embedded systems. ...
ISSS
2002
IEEE
14 years 14 days ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...