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» Compiler Design Issues for Embedded Processors
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DAC
2002
ACM
14 years 9 months ago
Energy estimation and optimization of embedded VLIW processors based on instruction clustering
Aim of this paper is to propose a methodology for the definition of an instruction-level energy estimation framework for VLIW (Very Long Instruction Word) processors. The power mo...
Andrea Bona, Mariagiovanna Sami, Donatella Sciuto,...
ASPLOS
1992
ACM
14 years 20 days ago
Design and Evaluation of a Compiler Algorithm for Prefetching
Software-controlled data prefetching is a promising technique for improving the performance of the memory subsystem to match today's high-performance processors. While prefet...
Todd C. Mowry, Monica S. Lam, Anoop Gupta
CASES
2008
ACM
13 years 10 months ago
Exploring and predicting the architecture/optimising compiler co-design space
Embedded processor performance is dependent on both the underlying architecture and the compiler optimisations applied. However, designing both simultaneously is extremely difficu...
Christophe Dubach, Timothy M. Jones, Michael F. P....
MICRO
2002
IEEE
173views Hardware» more  MICRO 2002»
14 years 1 months ago
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
Christoforos E. Kozyrakis, David A. Patterson
SAMOS
2010
Springer
13 years 7 months ago
Cycle-accurate performance modelling in an ultra-fast just-in-time dynamic binary translation instruction set simulator
—Instruction set simulators (ISS) are vital tools for compiler and processor architecture design space exploration and verification. State-of-the-art simulators using just-in-ti...
Igor Böhm, Björn Franke, Nigel P. Topham