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» Compiler Design Issues for Embedded Processors
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CASES
2006
ACM
14 years 2 months ago
Scalable subgraph mapping for acyclic computation accelerators
Computer architects are constantly faced with the need to improve performance and increase the efficiency of computation in their designs. To this end, it is increasingly common ...
Nathan Clark, Amir Hormati, Scott A. Mahlke, Sami ...
ASPDAC
2005
ACM
89views Hardware» more  ASPDAC 2005»
13 years 10 months ago
System-level design space exploration for security processor prototyping in analytical approaches
— The customization of architectures in designing the security processor-based systems typically involves timeconsuming simulation and sophisticated analysis in the exploration o...
Yung-Chia Lin, Chung-Wen Huang, Jenq Kuen Lee
ISSS
1995
IEEE
161views Hardware» more  ISSS 1995»
14 years 4 days ago
Synthesis of pipelined DSP accelerators with dynamic scheduling
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens,...
DAC
2004
ACM
14 years 9 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
DAC
2002
ACM
14 years 9 months ago
An integer linear programming based approach for parallelizing applications in On-chip multiprocessors
With energy consumption becoming one of the first-class optimization parameters in computer system design, compilation techniques that consider performance and energy simultaneous...
Ismail Kadayif, Mahmut T. Kandemir, Ugur Sezer