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ISCA
2010
IEEE
170views Hardware» more  ISCA 2010»
14 years 24 days ago
Relax: an architectural framework for software recovery of hardware faults
As technology scales ever further, device unreliability is creating excessive complexity for hardware to maintain the illusion of perfect operation. In this paper, we consider whe...
Marc de Kruijf, Shuou Nomura, Karthikeyan Sankaral...
CAMP
2005
IEEE
14 years 1 months ago
Low Power Image Processing: Analog Versus Digital Comparison
— In this paper, a programmable analog retina is presented and compared with state of the art MPU for embedded imaging applications. The comparison is based on the energy require...
Jacques-Olivier Klein, Lionel Lacassagne, Herv&eac...
ASAP
2004
IEEE
102views Hardware» more  ASAP 2004»
13 years 11 months ago
A Hierarchical Classification Scheme to Derive Interprocess Communication in Process Networks
The Compaan compiler automatically derives a Process Network (PN) description from an application written in Matlab. The basic element of a PN is a Producer/Consumer (P/C) pair. F...
Alexandru Turjan, Bart Kienhuis, Ed F. Deprettere
DATE
2005
IEEE
180views Hardware» more  DATE 2005»
14 years 1 months ago
A Coprocessor for Accelerating Visual Information Processing
Visual information processing will play an increasingly important role in future electronics systems. In many applications, e.g. video surveillance cameras, data throughput of mic...
Walter Stechele, L. Alvado Cárcel, Stephan ...
CODES
2005
IEEE
14 years 1 months ago
The design of a smart imaging core for automotive and consumer applications: a case study
This paper describes the design of a low-cost, low-power smart imaging core that can be embedded in cameras. The core integrates an ARM 9 processor, a camera interface and two spe...
Wido Kruijtzer, Winfried Gehrke, Víctor Rey...