Sciweavers

559 search results - page 65 / 112
» Compiling Image Processing Applications to Reconfigurable Ha...
Sort
View
PPPJ
2009
ACM
14 years 3 months ago
Automatic parallelization for graphics processing units
Accelerated graphics cards, or Graphics Processing Units (GPUs), have become ubiquitous in recent years. On the right kinds of problems, GPUs greatly surpass CPUs in terms of raw ...
Alan Leung, Ondrej Lhoták, Ghulam Lashari
DATE
2008
IEEE
168views Hardware» more  DATE 2008»
14 years 3 months ago
Cycle-approximate Retargetable Performance Estimation at the Transaction Level
This paper presents a novel cycle-approximate performance estimation technique for automatically generated transaction level models (TLMs) for heterogeneous multicore designs. The...
Yonghyun Hwang, Samar Abdi, Daniel Gajski
DATE
2010
IEEE
183views Hardware» more  DATE 2010»
13 years 7 months ago
Toward optimized code generation through model-based optimization
—Model-Based Development (MBD) provides an al level of abstraction, the model, which lets engineers focus on the business aspect of the developed system. MBD permits automatic tr...
Asma Charfi, Chokri Mraidha, Sébastien G&ea...
DATE
2008
IEEE
163views Hardware» more  DATE 2008»
14 years 3 months ago
Design flow for embedded FPGAs based on a flexible architecture template
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
B. Neumann, Thorsten von Sydow, Holger Blume, Tobi...
ASAP
2003
IEEE
133views Hardware» more  ASAP 2003»
14 years 2 months ago
Storage Management in Process Networks using the Lexicographically Maximal Preimage
At the Leiden Embedded Research Center, we are developing a compiler called Compaan that automatically translates signal processing applications written in Matlab into Kahn Proces...
Alexandru Turjan, Bart Kienhuis