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DATE
2005
IEEE
115views Hardware» more  DATE 2005»
14 years 1 months ago
An Infrastructure to Functionally Test Designs Generated by Compilers Targeting FPGAs
This paper presents an infrastructure to test the functionality of the specific architectures output by a highlevel compiler targeting dynamically reconfigurable hardware. It resu...
Rui Rodrigues, João M. P. Cardoso
CASES
2007
ACM
13 years 11 months ago
Compiler generation from structural architecture descriptions
With increasing complexity of modern embedded systems, the availability of highly optimizing compilers becomes more and more important. At the same time, application specific inst...
Florian Brandner, Dietmar Ebner, Andreas Krall
IEEEPACT
2002
IEEE
14 years 14 days ago
Effective Compilation Support for Variable Instruction Set Architecture
Traditional compilers perform their code generation tasks based on a fixed, pre-determined instruction set. This paper describes the implementation of a compiler that determines ...
Jack Liu, Timothy Kong, Fred C. Chow
DAC
1996
ACM
13 years 11 months ago
Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures
The advent of parallel executing Address Calculation Units (ACUs) in Digital Signal Processor (DSP) and Application Specific InstructionSet Processor (ASIP) architectures has made...
Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerra...
LCPC
1995
Springer
13 years 11 months ago
Compiler Architectures for Heterogeneous Systems
Heterogeneous parallel systems incorporate diverse models of parallelism within a single machine or across machines and are better suited for diverse applications 25, 43, 30]. Thes...
Kathryn S. McKinley, Sharad Singhai, Glen E. Weave...